1. Field of the Invention
The present invention relates to a retiming circuit, for example, a retiming circuit provided in an optical receiving unit in an optical data transmission system.
For example, when a logic "1" or "0" of an optical data signal transmitted from an optical transmitting unit at one end of the optical data transmission system is discriminated at the optical receiving unit placed at the other end thereof, desirably the discrimination is carried out at the center portion of each pulse corresponding to the logic "1" and "0". This is because, generally, there is a lot of noise in the vicinity of the rising edge of each pulse and in the vicinity of the falling edge of each pulse, and therefore it is most correct to judge the logic "1" or "0" at the center portion where there is the least noise. For this reason, the phase between the input data and clock is adjusted so that each optical data signal received at the optical receiving unit, that is, the center portion of each input data, and the timing for the discrimination substantially coincide. This is done by the retiming circuit.
2. Description of the Related Art
As will be explained in more detail later by using the drawings, if the retiming circuit of the related art is adopted, the following two problems arise.
First, there is the problem that, according to the retiming circuit of the related art, the optimum phase clock (CLK) is selected by just the rising changing point of the input data (Din), therefore when there is a fluctuation in the duty, explained later, it is no longer possible to sample the center portion of a pulse. This is because the true center portion of the pulse must be determined by taking not only the rising changing point of the input data (Din), but also its falling changing point into account.
Second, there is the problem that, according to the retiming circuit of the related art, it is difficult to sample the center portion of each pulse with an extremely high precision for all of various input data (Din) from a large number of subscriber side equipment. This is because, in the retiming circuit of the related art, it is necessary to select one optimum phase clock from among limited number of types of clocks.